cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 1/9 MTD010P03Q8 cystek product specification p-channel enhancement mode mosfet MTD010P03Q8 bv dss -30v i d @v gs =-10v, t a =25 c -10.4a i d @v gs =-10v, t a =70 c -8.3a r dson @v gs =-20v, i d =-12a 10m (typ) r dson @v gs =-10v, i d =-12a 11m (typ) r dson @v gs =-6v,i d =-10a 13.3m (typ) features ? simple drive requirement ? low on-resistance ? fast switching speed ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTD010P03Q8-0-t3-g sop-8 (pb-free lead plating and halogen-free package) 2500 pcs/ tape & reel MTD010P03Q8 sop-8 d d d d g gate s source g s s d drain environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel,13? reel product rank, zero for no rank products product name s pin 1
cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 2/9 MTD010P03Q8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source breakdown voltage bv dss -30 gate-source voltage v gs 25 v continuous drain current @ v gs =-10v, t a =25 c (note 1) -10.4 continuous drain current @ v gs =-10v, t a =70 c (note 1) i d -8.3 pulsed drain current (note 2) i dm -88 avalanche current @ l=0.1mh i as -34 continuous source-drain diode current i s -5 a avalanche energy @ l=1mh, i d =-16a, v dd =-25v (note 3) e as 128 mj t a =25 c 3.1 total power dissipation (note 1) t a =70 c p d 2 w operating junction and storage temperature tj, tstg -55~+150 c note : 1.surface mounted on fr-4 board, t 10sec. 2. pulse width 300 s, duty cycle 2% 3.100% tested by conditions of v dd =-15v, v gs =-10v, l=0.1mh, i as =-20a thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 20 thermal resistance, junction-to-ambient, max r ja 40 (note ) c/w note : surface mounted on 1 in2 copper pad of fr-4 board, pulse width 10s. electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -30 - - v gs =0v, i d =-250 a v gs(th) -1.7 - -2.8 v v ds =v gs , i d =-250 a i gss - - 100 na v gs =25v, v ds =0v - - -1 v ds =-30v, v gs =0v i dss - - -5 a v ds =-24v, v gs =0v, tj=55 c - 10 13 v gs =-20v, i d =-12a - 11 14 v gs =-10v, i d =-12a *r ds(on) - 13.3 18 m v gs =-6v, i d =-10a *g fs - 12.9 - s v ds =-10v, i d =-5a dynamic ciss - 2436 3166 coss - 233 - crss - 158 - pf v ds =-15v, v gs =0v, f=1mhz *t d(on) - 13.6 - *t r - 20 - *t d(off) - 76.6 - *t f - 17.4 - ns v dd =-15v, i d =-12a, v gs =-10v, r g =1
cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 3/9 MTD010P03Q8 cystek product specification *qg 36 45 54 *qgs - 8.6 - *qgd - 8.5 - nc v ds =-15v, v gs =-10v, i d =-12a source drain diode *i s - - -5 *i sm - - -20 a *v sd - -0.73 -1 v v gs =0v, i s =-1a trr - 15.5 20 ns qrr - 8.1 - nc i f =-1a, di f /dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% recommended soldering footprint
cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 4/9 MTD010P03Q8 cystek product specification typical characteristics typical output characteristics 0 10 20 30 40 50 01234 5 brekdown voltage vs ambient temperature 0.4 0.6 0.8 1.0 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage -v ds , drain-source voltage(v) -i d , drain current (a) -10v, -6v, -5.5v,-5v, -4.5v -4v -3.5v i d =-250 a, v gs =0v v gs =-3v static drain-source on-state resistance vs drain current 10 100 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) from top to bottom : v gs =-4.5v, -6v, -7v, -10v source drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 02468 -i s , source drain current(a) -v sd , source-drain voltage(v) 10 v gs =0v tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 5 10 15 20 25 30 35 40 45 50 024681 0 drain-source on-state resistance vs junction tempearture 0.0 0.4 0.8 1.2 1.6 2.0 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain-source on-state resistance -v gs , gate-source voltage(v) r ds(on) , static drain-source on-state resistance(m) v gs =-10v, i d =-12a i d =-12a i d =-10a r ds( on) @tj=25c : 11m typ.
cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 5/9 MTD010P03Q8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 100 1000 10000 0 5 10 15 20 25 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) -v gs(th) , threshold voltage(v) i d =-250 a i d =-1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer admittance(s) pulsed t a =25c v ds =-15v v ds =-10v gate charge characteristics 0 2 4 6 8 10 0 6 12 18 24 30 36 42 48 54 60 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-12a v ds =-15v v ds =-24v maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -i d , drain-source voltage(v) -i d , drain current(a) dc 10ms 100ms 100 s t a =25c, tj=150c, v gs =-10v r ja =40c/w, single pulse 1s 1ms r ds( on) limited maximum drain current vs junction temperature 0 2 4 6 8 10 12 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, tj=150c, v gs =-10v r ja =40c/w
cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 6/9 MTD010P03Q8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 10 20 30 40 50 012345 -v gs , gate-source voltage(v) -i d , drain current (a) v ds =-10v single pulse power rating, junction to ambient (note on page 2) 0 50 100 150 200 250 300 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c r ja =40c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =40 c/w
cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 7/9 MTD010P03Q8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 8/9 MTD010P03Q8 cystek product specification recommended wave soldering condition peak temperature soldering time product pb-free devices 5 +1/-1 seconds 260 +0/-5 c recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6c/second max. 6 minutes max. 8 minutes max. time 25 c to peak temperature note :1. all temperatures refer to topside of the package, measured on the package body surface. 2.for devices mounted on fr-4 pcb of 1.6mm or equivalent grade pcb. if other grade pcb is used, care should be taken to match the coeffi cients of thermal expansion betw een components and pcb. if they are not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the assembly cools.
cystech electronics corp. spec. no. : c391q8 issued date : 2017.03.21 revised date : page no. : 9/9 MTD010P03Q8 cystek product specification sop-8 dimension millimeters inches millimeters inches dim marking: d010 device name p03 date code date code(counting from left to right) : 1 st code: year code, the last digit of christian year 2 nd code : month code, jan a, feb b, mar c, apr d may e, jun f, jul g, a u g h, sep j, oct k, nov l, dec m 3 rd and 4 th codes : prodcution serial number, 01~99 8-lead sop-8 plastic package cystek packa g e code: q8 min. max. min. max. dim min. max. min. max. a 1.350 1.750 0.053 0.069 e 3.800 4.000 0.150 0.157 a1 0.100 0.250 0.004 0.010 e1 5.800 6.200 0.228 0.244 a2 1.350 1.550 0.053 0.061 e 1.270 (bsc) 0.050 (bsc) b 0.330 0.510 0.013 0.020 l 0.400 1.270 0.016 0.050 c 0.170 0.250 0.006 0.010 0 8 0 8 d 4.700 5.100 0.185 0.200 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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